Title : ( Reducing Short Channel Effects in Dual Gate SOI-MOSFETs with a Drain Dependent Gate Bias )
Authors: M. Khani Parashloh , Seyed Ebrahim Hosseini , I. abaspur kazerouni ,
Full TextAbstract
In this paper we propose a new dual gate SOI-MOSFET in order to reduce short-channel effects (SCEs). In the proposed structure, the bias of the second gate which is near the drain is dependent on the drain voltage. To investigate transistor characteristics, a two–dimensional (2-D) analytical model for the surface potential variation along the channel is developed. A comparison between our structure and the single-gate (SG) SOI MOSFET demonstrates that short channel effects like, hot carriers effect and the drain induced barrier lowering (DIBL) are reduced considerably in the proposed structure.
Keywords
, Drain dependent gate voltage, short-channel effects (SCEs), hot carriers, drain induced barrier lowering (DIBL)
@inproceedings{paperid:1026917,
author = {M. Khani Parashloh and Hosseini, Seyed Ebrahim and I. Abaspur Kazerouni},
title = {Reducing Short Channel Effects in Dual Gate SOI-MOSFETs with a Drain Dependent Gate Bias},
booktitle = {هجدهمین کنفرانس مهندسی برق ایران},
year = {2010},
location = {اصفهان, IRAN},
keywords = {Drain dependent gate voltage; short-channel effects (SCEs); hot carriers; drain induced barrier lowering (DIBL)},
}
%0 Conference Proceedings
%T Reducing Short Channel Effects in Dual Gate SOI-MOSFETs with a Drain Dependent Gate Bias
%A M. Khani Parashloh
%A Hosseini, Seyed Ebrahim
%A I. Abaspur Kazerouni
%J هجدهمین کنفرانس مهندسی برق ایران
%D 2010
