Title : ( Domino logic designs for high-performance and leakage-tolerant applications )
Authors: Farshad Moradi , Tuan Vu Cao , Elena I. Vatajelu , Ali Peiravi , Hamid Mahmoodi , Dag T. Wisland ,
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Abstract
Robustness of high fan-in domino circuits is degraded by technology scaling due to exponential increase in leakage.In this paper, we propose severald ominol ogicci rcuit techniques to improve the robustness and performance along with leakage power. Lower total power consumption is achieved by utilizing proposed techniques. According to the simulations in TSMC65nm CMOS process, the proposed circuits increase noise immunity for wide OR gates by at least 3.5X and shows performance improvement of upto 20% compared to conventional domino logic circuits. For FinFET simulation TCAD tools have been used.
Keywords
, Domino logic, FinFet, High Speed, Leakage
@article{paperid:1034911,
author = {Farshad Moradi and Tuan Vu Cao and Elena I. Vatajelu and Peiravi, Ali and Hamid Mahmoodi and Dag T. Wisland},
title = {Domino logic designs for high-performance and leakage-tolerant applications},
journal = {Integration, the VLSI Journal},
year = {2013},
volume = {46},
number = {3},
month = {June},
issn = {0167-9260},
pages = {247--254},
numpages = {7},
keywords = {Domino logic; FinFet; High Speed; Leakage},
}
%0 Journal Article
%T Domino logic designs for high-performance and leakage-tolerant applications
%A Farshad Moradi
%A Tuan Vu Cao
%A Elena I. Vatajelu
%A Peiravi, Ali
%A Hamid Mahmoodi
%A Dag T. Wisland
%J Integration, the VLSI Journal
%@ 0167-9260
%D 2013
