In this paper, a novel circuit design idea is proposed for improving the noise immunity of domino logic circuits that are especially useful for wide fan in gates. Leakage current is the most important issue in ultra deep submicron technologies. This is the main motivation for proposing a new idea for decreasing sub-threshold leakage current in domino logic circuits for deep submicron technologies. The proposed circuit design enhances the noise immunity at least by a factor of 2.02X to 8.16X compared with other conventional domino circuits and does not suffer from the disadvantages of our previously proposed design. The proposed circuit design has been simulated using the Predictive Technology Models (PTM) for 70nm CMOS technology.

Keywords