The effect of gate length on the operation of silicon-on-insulator (SOI) MOSFET structure with a layer of buried silicon oxide added to isolate the device body has been simulated. Three transistors with gate lengths of 100, 200 and 500 nm are simulated. Simulations show that with a fixed channel length, when the gate length is increased, the output drain current characteristics slope is increased, and therefore the transistor transconductance increases. Moreover, with increasing the gate length, the effect of the drain voltage on the drain current is reduced, which results in the reduced drain induced barrier lowering.

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