Analog implementations of decoders have been widely studied, with promising results in terms of circuit complexity, power and speed. To attempt to integrate these decoders with other analog front-end processing blocks is an extension of analog decod- ing research. An analog FFT would be suitable for combination with an analog decoder in the making of an all-analog communication front-end for OFDM sys- tems. In this paper, the implementation of a 16-symbol Fast Fourier Transform processor based on analog CMOS current mirrors within circuit and system level is presented, and the FFT is implemented using a butterfly diagram, where each node is implemented using analog circuits. Implementation details include considera- tion of effects of transistors mismatch and inherent noises and effects of circuit non-linearity in OFDM system performance. It is shown that not only transistor inherent noises can be mea- sured but also transistors mismatch can be applied as an input-referred noise source that can be used in system and circuit level studies. Simulations of a radix-2, 16-symbol fast Fourier transform (FFT) show that proposed circuits consume very low power and impacts of noise, mismatch and non-linearity for each node of this processor are very small.

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