IEEE Transactions on Very Large Scale Integration (VLSI) Systems, ( ISI ), Volume (27), No (1), Year (2019-1) , Pages (182-192)

Title : ( An Analog LO Harmonic Suppression Technique for SDR Receivers )

Authors: Amir Bazrafshan , Frederic Nabki ,

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Abstract

A low-complexity analog technique to suppress the local oscillator (LO) harmonics in software-defined radios is presented. Accurate mathematical analyses show that an effective attenuation of the LO harmonics is achieved by modulating the transconductance of the low-noise transconductance amplifier (LNTA) with a raised-cosine signal. This modulation is performed through the bias network of a cascode device with a negligible increase in the LNTA noise figure. The proposed technique results in a notch at the third harmonic and at least 36 dB of attenuation at the fifth and the seventh harmonics. Experimental results in 130-nm CMOS and postlayout simulation results in 65-nm CMOS verify the proper functionality of the proposed technique and the accuracy of the proposed analyses.

Keywords

, Blocker, filtering, interference, local oscillator (LO) harmonics, low-noise transconductance amplifier (LNTA), mixer, software-defined radios (SDRs), wideband
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@article{paperid:1078652,
author = {Bazrafshan, Amir and Frederic Nabki},
title = {An Analog LO Harmonic Suppression Technique for SDR Receivers},
journal = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
year = {2019},
volume = {27},
number = {1},
month = {January},
issn = {1063-8210},
pages = {182--192},
numpages = {10},
keywords = {Blocker; filtering; interference; local oscillator (LO) harmonics; low-noise transconductance amplifier (LNTA); mixer; software-defined radios (SDRs); wideband},
}

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%0 Journal Article
%T An Analog LO Harmonic Suppression Technique for SDR Receivers
%A Bazrafshan, Amir
%A Frederic Nabki
%J IEEE Transactions on Very Large Scale Integration (VLSI) Systems
%@ 1063-8210
%D 2019

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