Nowadays cascode structures or vertical arrangements of MOSFETs can not satisfy demands regarding high gain amplifiers. As a direct result, the only promising choice turns to Multi-stage amplifiers via cascading gain stages. The challenge here is stability issues which shows itself by different frequency compensation. All problem starts with increasing number of nodes and consequent poles. The poles degenerate phase of system and need to be controlled. In this work, a five-stage amplifier is targeted for a new and efficient frequency compensation technique. The major contribution of proposed approach is using only two Miller capacitors with considerable small values (10 pF) compared to load capacitor (500 pF). This achieved via exploiting two differential active stages which intensify Miller effect and provide capability to share Miller capacitor at multiple loops simultaneously. The proposed amplifier with corresponding frequency compensation is described symbolically while a circuit level implementation is performed via HSPICE circuit simulator and TSMC 0.18 μm CMOS technology. Based on simulation results, the proposed amplifier expresses a DC gain of 195 dB, a gain bandwidth product of 15.2 MHz, a phase margin of 90°, and a power dissipation of 570 μW

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