: In this paper, a software technique for the design of combinational digital circuits with minimum silicon surface allocation and gate propagation delay using genetic algorithm is presented. In existing methods which use the initial chromosome for the gate and then find the optimum solution using a library of gates, there is a possibility of missing some possible combinations of primary circuits with which the desired function may be realized. Thus the outcome may be a local optimum, not the global one. In our approach to this problem, all the possible states of a circuit are first analyzed. The program will automatically define the initial chromosome and proceed to find the optimum circuit for the desired function. The program has been coded in C++ and it includes a library of the various gates with their respective size on the silicon wafer and propagation delay.

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