ISCAS 2007 , 2007-05-27

Title : ( On the Linearization of MOSFET Capacitors )

Authors: Mohammad Danaie , , Sasan Naseh ,

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In this paper, a heuristic methodology for design of highly linear MOSFET capacitors (MOSCAPs) has been presented. For a certain amount of accessible chip area, the proposed algorithm intends to find the structure which has the least C-V variation. It uses a modified version of the genetic programming to optimize the capacitor topology and transistors\\\\\\\' dimensions. To test the performance of the algorithm, it was utilized for obtaining a highly linear 1 pF capacitor, i.e. with less than 3% variation of capacitance versus 1 V variation across the MOSCAP structure terminals, in a commercial 0.18 µm standard digital CMOS technology. This level of linearity can be otherwise achieved only with MIM capacitors, which are not available in digital CMOS processes.

Keywords

, MOSFET Capacitor, linearization, C-V
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@inproceedings{paperid:1008281,
author = {Danaie, Mohammad and , and Naseh, Sasan},
title = {On the Linearization of MOSFET Capacitors},
booktitle = {ISCAS 2007},
year = {2007},
location = {USA},
keywords = {MOSFET Capacitor; linearization; C-V variation},
}

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%0 Conference Proceedings
%T On the Linearization of MOSFET Capacitors
%A Danaie, Mohammad
%A ,
%A Naseh, Sasan
%J ISCAS 2007
%D 2007

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