Title : ( Ultra Low Power Full Adder Topologies )
Authors: Farshad Moradi , Dag.T. Wisland , Hamid Mahmoodi , Snorre Aunet , Tuan Vu Cao , Ali Peiravi ,
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Abstract
In this paper several low power full adder topologies are presented. The main idea of these circuits is based on the sense energy recovery full adder (SERF) design and the GDI (Gate diffusion input) technique. These subthreshold circuits are employed for ultra low power applications. While the proposed circuits have some area overhead that is negligible, they have at least 62% less power dissipation when compared with existing designs. In this paper, 65nm standard models are used for simulations.
Keywords
, GDI, SERF, Full adder, Subthreshold
@inproceedings{paperid:1010887,
author = {Moradi, Farshad and Dag.T. Wisland and Hamid Mahmoodi and Snorre Aunet and Tuan Vu Cao and Peiravi, Ali},
title = {Ultra Low Power Full Adder Topologies},
booktitle = {IEEE International Symposium on Circuits and Systems 2009 ISCAS 2009},
year = {2009},
location = {Taipei},
keywords = {GDI; SERF; Full adder; Subthreshold},
}
%0 Conference Proceedings
%T Ultra Low Power Full Adder Topologies
%A Moradi, Farshad
%A Dag.T. Wisland
%A Hamid Mahmoodi
%A Snorre Aunet
%A Tuan Vu Cao
%A Peiravi, Ali
%J IEEE International Symposium on Circuits and Systems 2009 ISCAS 2009
%D 2009
