Title : ( DTMOS Technique for Low-Voltage Analog Circuits )
Authors: Mohammad Maymandi Nejad , Manoj Sachdev ,
Full TextAbstract
In this paper, the application of dynamic threshold MOS (DTMOS) technique for low-voltage analog circuits is explored. The body terminal of PMOS transistors in bulk CMOS technology can be used as the forth terminal to enhance the performance of low-voltage analog circuits. To show the effectiveness of this technique, we have designed a continuous time common mode feedback (CMFB) circuit for a sub 1-V opamp and a new sub 1-V, 1-bit quantizer. A 0.8-V opamp with embedded CMFB and a 0.8-V, 1-bit quantizer for low-voltage delta-sigma modulators are implemented in 0.18 um CMOS technology. The simulation results as well as the measurement data of these blocks are presented in this paper.
Keywords
, 1-bit quantizer, CMOS analog circuits, comparator, delta-sigma modulator, dynamic threshold MOS (DTMOS), operational amplifier.
@article{paperid:1011552,
author = {Maymandi Nejad, Mohammad and Manoj Sachdev},
title = {DTMOS Technique for Low-Voltage Analog Circuits},
journal = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
year = {2006},
volume = {14},
number = {10},
month = {October},
issn = {1063-8210},
pages = {1151--1156},
numpages = {5},
keywords = {1-bit quantizer; CMOS analog circuits; comparator; delta-sigma
modulator; dynamic threshold MOS (DTMOS); operational amplifier.},
}
%0 Journal Article
%T DTMOS Technique for Low-Voltage Analog Circuits
%A Maymandi Nejad, Mohammad
%A Manoj Sachdev
%J IEEE Transactions on Very Large Scale Integration (VLSI) Systems
%@ 1063-8210
%D 2006
