IEEE International Symposium on Circuits and Systems-ISCAS 2008 , 2008-05-18

Title : ( A fully digital ADC using a new delay element with enhanced linearity )

Authors: Hooman Farkhani , Mohammad Maymandi Nejad , Manoj Sachdev ,

Citation: BibTeX | EndNote

Abstract

Fully digital analog to digital converters (FD-ADC) have potential applications in very low power ICs and can be implemented in digital CMOS technology. In this paper the nonlinearity of the delay element (DE), which is the main building block in an FD-ADC, is discussed and its impact on the overall performance of the ADC is addressed. It is shown that the nonlinearity of the delay element should be within certain limits in order to achieve the best signal to noise plus distortion ratio (SNDR). Also, a new current starved delay element with enhanced linearity is proposed. Using the proposed DE, the SNDR of a 6-bit FD-ADC is improved by 7dB.

Keywords

, Delay element, CMOS, fully digital, ADC, SNR, SNDR, linearity
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@inproceedings{paperid:1011570,
author = {Farkhani, Hooman and Maymandi Nejad, Mohammad and Manoj Sachdev},
title = {A fully digital ADC using a new delay element with enhanced linearity},
booktitle = {IEEE International Symposium on Circuits and Systems-ISCAS 2008},
year = {2008},
location = {USA},
keywords = {Delay element; CMOS; fully digital; ADC; SNR; SNDR; linearity},
}

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%0 Conference Proceedings
%T A fully digital ADC using a new delay element with enhanced linearity
%A Farkhani, Hooman
%A Maymandi Nejad, Mohammad
%A Manoj Sachdev
%J IEEE International Symposium on Circuits and Systems-ISCAS 2008
%D 2008

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