International Review of Electrical Engineering-IREE, ( ISI ), Volume (4), No (4), Year (2009-7) , Pages (660-669)

Title : ( Optimal design of derating, HALT, and ESS procedures for high reliability analog electronic products )

Authors: Ali Peiravi ,

Access to full-text not allowed by authors

Citation: BibTeX | EndNote

Reliability is one of the main salient assets of modern electronic systems and its improvement is of utmost importance in manufacturing high-reliability electronic products, especially in military and medical electronic systems. The design and development of reliable electronic products is a highly challenging task. Reliability improvement is possible through designing in reliability, derating of parts, and implementing a thorough testing program to achieve maximum reliability at minimum costs. Highly accelerated life testing in the initial stages of development and environmental stress screening programs for the later stages of product manufacturing and testing are practical tools to this end. In this paper, interconnect stress testing, derating of parts, destructive highly accelerated life testing and environmental stress screening programs developed for high reliability analog electronic products manufactured locally are presented. Optimal design is proposed using existing Rome Air Development Center\'s Environmental Stress Screening (RADC ESS) efficiency models. Results of printed circuit board (PCB) testing and actual highly accelerated lifetime testing (HALT) and environmental stress screening (ESS) testing of the printed circuit boards of the product are presented.Copyright © 2009 Praise Worthy Prize S.r.l. - All rights reserved.

Keywords

, Accelerated life testing, derating, reliability, thermal cycling, environmental stress screening, ESS
برای دانلود از شناسه و رمز عبور پرتال پویا استفاده کنید.

@article{paperid:1012033,
author = {Peiravi, Ali},
title = {Optimal design of derating, HALT, and ESS procedures for high reliability analog electronic products},
journal = {International Review of Electrical Engineering-IREE},
year = {2009},
volume = {4},
number = {4},
month = {July},
issn = {1827-6660},
pages = {660--669},
numpages = {9},
keywords = {Accelerated life testing; derating; reliability; thermal cycling; environmental stress screening; ESS efficiency},
}

[Download]

%0 Journal Article
%T Optimal design of derating, HALT, and ESS procedures for high reliability analog electronic products
%A Peiravi, Ali
%J International Review of Electrical Engineering-IREE
%@ 1827-6660
%D 2009

[Download]