The Third International Japan-Egypt Conference on Electronics, Communications and Computers , 2015-03-16

Title : ( Implementing a High Throughput, Configurable and Parameterizable Packet Filtering Firewall on FPGA )

Authors: Mostafa Safaie , Hamid Noori , Farhad Mehdipour ,

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Security is a growing concern brought by explosive development of the computer networks. Firewalls are building blocks forming a first line of defense in the network security architecture. We have implemented a firewall on Field-Programmable Gate Array (FPGA). The firewall takes advantage of Ternary Content Addressable Memories (TCAMs) to store rule tables. Two different methods to update the firewall rules in TCAM modules are presented and verified. The proposed firewall system achieves operating frequency of 185 MHz and is able to filter up to 52×100 Mbps Ethernet channels for the worst-case packet size, whereas it only utilizes 1% of available hardware resources of Altera Cyclone IV FPGA.

Keywords

, Network firewall, FPGA,
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@inproceedings{paperid:1047525,
author = {Safaie, Mostafa and Noori, Hamid and Farhad Mehdipour},
title = {Implementing a High Throughput, Configurable and Parameterizable Packet Filtering Firewall on FPGA},
booktitle = {The Third International Japan-Egypt Conference on Electronics, Communications and Computers},
year = {2015},
location = {Fukuoka},
keywords = {Network firewall; FPGA; TCAM.},
}

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%0 Conference Proceedings
%T Implementing a High Throughput, Configurable and Parameterizable Packet Filtering Firewall on FPGA
%A Safaie, Mostafa
%A Noori, Hamid
%A Farhad Mehdipour
%J The Third International Japan-Egypt Conference on Electronics, Communications and Computers
%D 2015

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