This paper presents an efficient hardware-based approach for segmentation of brain MR images utilizing kernel Fuzzy-C-Means (KFCM). First, the performance of the FCM algorithm for MR image segmentation is evaluated on 217*181 images of BrainWeb dataset by a software implementation of it. Experiments demonstrated that the proposed algorithm provides a clustering accuracy of 96%; an appropriate result comparedto other methods. After asserting the validity of the algorithm, the hardware implementation of the algorithm is conducted. Here, an overall architecture is proposed and designed toward being implemented on Xilinx FPGA Virtex7. Based on synthesis results, this design occupies approximately 19% of the hardware resources of xa7a100tcsg324-2I. Base obtained clock frequency of the designed system was 108MHz; then it is increased to 254 MHz by applying optimization techniques such as pipelining and reducing critical path delay. In the final proposed design, the amount of speed up factor compared to software implementation is 101.06. This improvement in speed is the aim of optimized hardware implementation.

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