The performance of System-on-Chip (SoC) strongly depends on the architecture of interconnections. Hypercube, an extended analogy of a three dimensional cube which covers higher than three dimensions, is a popular and well-known interconnection network. In this paper, we propose a variant of the hypercube named Pruned Shuffle Connected Cube (PSCQ). PSCQ maintains all desired properties of the hypercube with reduced node edges, lower diameter length, lower average distance, and lower average vertex degree. Furthermore, some limitations of the hypercube are obviated. Knowing that minor improvement in these measures can have a great impact on the efficiency of the model, many improved versions of hypercube have been proposed. However, the proposed version of this research improves all performance measures. The detailed architecture and comparing of topological parameters are discussed and comparative results with state of the art versions are presented.

Keywords