Title : ( Hardware Implementation of the DVI Protocol for Displaying Neural Network and Image Processing Outputs on FPGA ML605 )
Authors: Saeede Yazdani , Danial Bayati , Sara Ershadi nasab ,
Full TextAbstract
This paper presents the implementation and testing of the Digital Visual Interface (DVI) protocol on the ML605 FPGA hardware. The goal was to create a DVI transmitter capable of converting VGA output to DVI pinouts while adhering to protocol standards. Using VHDL and the Xilinx Virtex-6 architecture, the system successfully met DVI specifications and demonstrated its applicability in displaying outputs from neural networks and image processing tasks.
Keywords
Hardware Implementation of the DVI Protocol for Displaying Neural Network and Image Processing Outputs on FPGA ML605
@inproceedings{paperid:1102242,
author = {Yazdani, Saeede and Bayati, Danial and Ershadi Nasab, Sara},
title = {Hardware Implementation of the DVI Protocol for Displaying Neural Network and Image Processing Outputs on FPGA ML605},
booktitle = {دومین سمپوزیوم منطقه ای نوآوری در علم و فناوری},
year = {2025},
location = {مشهد, IRAN},
keywords = {Hardware Implementation of the DVI Protocol for Displaying Neural Network and Image Processing Outputs on FPGA ML605},
}
%0 Conference Proceedings
%T Hardware Implementation of the DVI Protocol for Displaying Neural Network and Image Processing Outputs on FPGA ML605
%A Yazdani, Saeede
%A Bayati, Danial
%A Ershadi Nasab, Sara
%J دومین سمپوزیوم منطقه ای نوآوری در علم و فناوری
%D 2025
