Title : ( Modified Model for Settling Behavior of Operational Amplifiers in Nanoscale CMOS )
Authors: Hamidreza Rezaee Dehsorkh , nassim ravanshad , Reza Lotfi , Khlil Mafinezhad ,
Full TextAbstract
An accurate time-domain model for the settling behavior of folded-cascode operational amplifiers is presented. Using a velocity–saturation model for MOS transistors makes the proposed model suitable for nanoscale CMOS technologies. Both linear and nonlinear settling regimes and their combination are considered. Transistor-level HSPICE simulation results of a fully differential single-stage folded-cascode amplifier using BSIM4v3 models of a standard 90-nm CMOS process are presented to verify the accuracy of the proposed models.
Keywords
, Integrated circuit modeling, nanoscale CMOS, operational amplifiers (opamps), settling behavior, velocity saturation
@article{paperid:1011208,
author = {Rezaee Dehsorkh, Hamidreza and Ravanshad, Nassim and Lotfi, Reza and Mafinezhad, Khlil},
title = {Modified Model for Settling Behavior of Operational Amplifiers in Nanoscale CMOS},
journal = {IEEE Transactions on Circuits and Systems Part II: Express Briefs},
year = {2009},
volume = {56},
number = {5},
month = {May},
issn = {1549-7747},
pages = {384--388},
numpages = {4},
keywords = {Integrated circuit modeling; nanoscale CMOS; operational amplifiers (opamps); settling behavior; velocity saturation},
}
%0 Journal Article
%T Modified Model for Settling Behavior of Operational Amplifiers in Nanoscale CMOS
%A Rezaee Dehsorkh, Hamidreza
%A Ravanshad, Nassim
%A Lotfi, Reza
%A Mafinezhad, Khlil
%J IEEE Transactions on Circuits and Systems Part II: Express Briefs
%@ 1549-7747
%D 2009
