IEEE Transactions on Very Large Scale Integration (VLSI) Systems, ( ISI ), Volume (25), No (4), Year (2016-1) , Pages (1408-1420)

Title : ( Reliability Improvement of Hardware Task Graphs via Configuration Early fetch )

Authors: Reza Ramezani , Yasser Sedaghat , J. A. Clemente ,

Citation: BibTeX | EndNote

Abstract

This paper presents a technique to improve the reliability and the mean time to failure (MTTF) of hardware task graphs (TGs) running on reconfigurable computers. This technique, which has been named task early fetch, can be applied to a sequence of one or several applications, represented as TGs. It consists in carrying out the reconfiguration of some tasks within the execution of the previous TG, plus increasing the redundancy level of the early fetched tasks. Experimental results on actual TGs show the positive impacts of the proposed technique. Thus, without deteriorating the execution time (makespan), on average, a 114% MTTF improvement is achieved for no-fault-tolerant TGs, and the improvement is more significant when applying to fault-tolerant TGs. Finally, this paper presents a hardware implementation of a manager that applies these techniques at runtime and steers the execution of the running TGs. It demonstrates that, with 0.03% consumption of flip-flops and look-up tables and also 1.22% occupancy of block random access memory available on the Xilinx Virtex UltraScale XCVU095-2FFVA2104E field programmable gate array, the required runtime computations can be carried out in negligible delays.

Keywords

, Early fetch, fault tolerance (FT), fieldprogrammable gate arrays (FPGAs), reliability, scheduling, task graph (TG)
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@article{paperid:1060733,
author = {Ramezani, Reza and Sedaghat, Yasser and J. A. Clemente},
title = {Reliability Improvement of Hardware Task Graphs via Configuration Early fetch},
journal = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
year = {2016},
volume = {25},
number = {4},
month = {January},
issn = {1063-8210},
pages = {1408--1420},
numpages = {12},
keywords = {Early fetch; fault tolerance (FT); fieldprogrammable gate arrays (FPGAs); reliability; scheduling; task graph (TG)},
}

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%0 Journal Article
%T Reliability Improvement of Hardware Task Graphs via Configuration Early fetch
%A Ramezani, Reza
%A Sedaghat, Yasser
%A J. A. Clemente
%J IEEE Transactions on Very Large Scale Integration (VLSI) Systems
%@ 1063-8210
%D 2016

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