Title : DIESIGN GUIDELINES FOR HIGH-SPEED TWO-STAGE CMOS OPERATIONAL AMPLIFIERS ( Design Guidelines for High-Speed Two-Stage CMOS Operational Amplifiers )
Authors: , Reza Lotfi ,
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Abstract
This paper presents a well-defined procedure for the design of high-speed two-stage CMOS operational amplifiers. Cascode-compensated amplifiers with good trade-offs between speed, power and stability that make them suitable for high-speed applications are discussed. The structures are analyzed to obtain the required circuit-level parameters according to particular bandwidth and stability. A new technique to take into account the effect of transfer function zeros, which are traditionally neglected, is proposed. The effect of new capacitor sizing rules to split the compensation capacitance and increase the amplifier s speed has also been considered. Based on these novelties, a new methodology for the design of high-speed operational amplifiers is proposed.
Keywords
, analog design, frequency compensation, high-speed design, operational amplifiers, stability, two-stage cascode-compensated amplifiers
@article{paperid:203903,
author = {, and Lotfi, Reza},
title = {DIESIGN GUIDELINES FOR HIGH-SPEED TWO-STAGE CMOS OPERATIONAL AMPLIFIERS},
journal = {Arabian Journal for Science and Engineering},
year = {2007},
month = {December},
issn = {2193-567X},
keywords = {analog design; frequency compensation; high-speed design; operational amplifiers; stability; two-stage cascode-compensated amplifiers},
}
%0 Journal Article
%T DIESIGN GUIDELINES FOR HIGH-SPEED TWO-STAGE CMOS OPERATIONAL AMPLIFIERS
%A ,
%A Lotfi, Reza
%J Arabian Journal for Science and Engineering
%@ 2193-567X
%D 2007
