Microelectronics Reliability, ( ISI ), Volume (52), No (8), Year (2012-8) , Pages (1655-1659)

Title : ( Impacts of NBTI/PBTI on performance of domino logic circuits with high-k metal-gate devices in nanoscale CMOS )

Authors: Masaoud Houshmand Kaffashian , Reza Lotfi , Khlil Mafinezhad , Hamid Mahmoodi ,

Citation: BibTeX | EndNote

Abstract

Negative-bias temperature instability (NBTI) and positive-bias temperature instability (PBTI) weaken PFETs and high-k metal-gate NFETs, respectively. This paper provides comprehensive analyses on the impacts of NBTI and PBTI on wide fan-in domino gates with high-k metal-gate devices. The delay degradation and power dissipation of domino logic, as well as the Unity Noise Gain (UNG) are analyzed in the presence of NBTI/PBTI degradation. It has been shown that the main concern is the degradation impact on delay which can increase up to 16.2% in a lifetime of 3 years. We have also proposed a degradation tolerant technique to compensate for the NBTI/PBTI-induced delay degradation in domino gates with a negligible impact on UNG and power.

Keywords

, Negative-bias temperature instability (NBTI), positive-bias temperature instability (PBTI), high-k metal-gate, reliability
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@article{paperid:1033463,
author = {Houshmand Kaffashian, Masaoud and Lotfi, Reza and Mafinezhad, Khlil and Hamid Mahmoodi},
title = {Impacts of NBTI/PBTI on performance of domino logic circuits with high-k metal-gate devices in nanoscale CMOS},
journal = {Microelectronics Reliability},
year = {2012},
volume = {52},
number = {8},
month = {August},
issn = {0026-2714},
pages = {1655--1659},
numpages = {4},
keywords = {Negative-bias temperature instability (NBTI); positive-bias temperature instability (PBTI); high-k metal-gate; reliability},
}

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%0 Journal Article
%T Impacts of NBTI/PBTI on performance of domino logic circuits with high-k metal-gate devices in nanoscale CMOS
%A Houshmand Kaffashian, Masaoud
%A Lotfi, Reza
%A Mafinezhad, Khlil
%A Hamid Mahmoodi
%J Microelectronics Reliability
%@ 0026-2714
%D 2012

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